PerfSuite Hardware Performance Summary Report Version : 1.0 Created : Fri Oct 07 03:03:10 PM CDT 2005 Generator : psprocess 0.2 XML Source : BigScience.10583.xml Execution Information ============================================================================================ Date : Tue Oct 4 09:45:49 2005 Host : tg-c623 User : sarats Index Description Counter Value ============================================================================================ 1 Conditional branch instructions mispredicted..................... 7366738650 2 Conditional branch instructions correctly predicted.............. 125672381082 3 Floating point operations........................................ 443347620643 4 Cycles the FP unit(s) are stalled................................ 369576680331 5 Level 1 data cache accesses...................................... 151559454268 6 Level 1 data cache hits.......................................... 144983606882 7 Level 1 data cache misses........................................ 7490663647 8 Level 1 instruction cache reads.................................. 734335415209 9 Level 1 cache misses............................................. 8265477672 10 Level 2 data cache accesses...................................... 380075378226 11 Level 2 data cache misses........................................ 14331711569 12 Level 2 data cache reads......................................... 197045457701 13 Level 2 data cache writes........................................ 182778128825 14 Level 2 instruction cache reads.................................. 4346445637 15 Level 2 cache misses............................................. 14448905327 16 Level 3 data cache accesses...................................... 22711676153 17 Level 3 data cache hits.......................................... 9056860249 18 Level 3 data cache misses........................................ 5294352688 19 Level 3 data cache reads......................................... 13998394421 20 Level 3 data cache writes........................................ 287852385 21 Level 3 instruction cache misses................................. 23267006 22 Level 3 instruction cache reads.................................. 120006904 23 Level 3 cache misses............................................. 5308646400 24 Load instructions................................................ 309088898904 25 Cycles stalled on any resource................................... 641141324769 26 Store instructions............................................... 182381613274 27 Cycles with no instructions completed............................ 1144856437558 28 Cycles with no instruction issue................................. 1110047416275 29 Total translation lookaside buffer misses........................ 1035831983 30 Total cycles..................................................... 1927552210353 31 Instructions issued.............................................. 3119690833303 32 Instructions completed........................................... 2925480934384 Event Index ============================================================================================ 1: PAPI_BR_MSP 2: PAPI_BR_PRC 3: PAPI_FP_OPS 4: PAPI_FP_STAL 5: PAPI_L1_DCA 6: PAPI_L1_DCH 7: PAPI_L1_DCM 8: PAPI_L1_ICR 9: PAPI_L1_TCM 10: PAPI_L2_DCA 11: PAPI_L2_DCM 12: PAPI_L2_DCR 13: PAPI_L2_DCW 14: PAPI_L2_ICR 15: PAPI_L2_TCM 16: PAPI_L3_DCA 17: PAPI_L3_DCH 18: PAPI_L3_DCM 19: PAPI_L3_DCR 20: PAPI_L3_DCW 21: PAPI_L3_ICM 22: PAPI_L3_ICR 23: PAPI_L3_TCM 24: PAPI_LD_INS 25: PAPI_RES_STL 26: PAPI_SR_INS 27: PAPI_STL_CCY 28: PAPI_STL_ICY 29: PAPI_TLB_TL 30: PAPI_TOT_CYC 31: PAPI_TOT_IIS 32: PAPI_TOT_INS Statistics ============================================================================================ Counting domain........................................................ user Multiplexed............................................................ yes Floating point operations per cycle.................................... 0.230 Floating point operations per graduated instruction.................... 0.152 Graduated instructions per cycle....................................... 1.518 Issued instructions per cycle.......................................... 1.618 Graduated instructions per issued instruction.......................... 0.938 Level 1 instruction cache miss ratio................................... 0.006 Level 1 data cache accesses per graduated instruction.................. 0.052 Percentage of cycles with no instruction issued........................ 57.588 Percentage of cycles with no instruction completed..................... 59.394 % cycles stalled on any resource....................................... 33.262 Mispredicted branches per correctly predicted branch................... 0.059 Level 2 cache line reuse (data)........................................ -0.477 Level 3 cache line reuse (data)........................................ 1.707 Level 2 cache hit rate (data).......................................... -0.913 Level 3 cache hit rate (data).......................................... 0.631 Level 1 cache read miss ratio (instruction)............................ 0.006 Level 1 cache miss ratio (data)........................................ 0.049 Level 2 cache miss ratio (data)........................................ 0.038 Level 3 cache miss ratio (data)........................................ 0.233 Bandwidth used to level 1 cache (MB/s)................................. 410.550 Bandwidth used to level 2 cache (MB/s)................................. 1435.367 Bandwidth used to level 3 cache (MB/s)................................. 527.365 MFLOPS (cycles)........................................................ 344.082 MFLOPS (wall clock).................................................... 337.517 MIPS (cycles).......................................................... 2270.467 MIPS (wall clock)...................................................... 2227.146 CPU time (seconds)..................................................... 1288.493 Wall clock time (seconds).............................................. 1313.556 % CPU utilization...................................................... 98.092